X-ray and electron beam lithographic techniques have progressed so that it is now possible, through single-mask lithography, to produce electronic circuits and components having line widths as narrow as 0.2 microns. In addition, conventional mask-to-wafer alignment may be controlled to within a lateral accuracy of about 0.05 microns. By lateral herein is meant in the directions parallel to the plane of the mask or wafer.
Nevertheless, despite these accomplishments it is still not practical to produce multi-mask devices with fractional micron component sizes using X-ray or electron beam lithography, because of a number of sources of error that arise. For example, typically mask substrates must be very thin in order to transmit soft X-rays or electrons with reasonable efficiency. X-ray masks of boron nitride, silicon oxynitride, or polyimide have thicknesses whose range may be a fraction of a micron up to several microns. Mapping of 3-inch and 5-inch boron nitride masks of this type indicates that the average distortion error is 0.2 microns and the maximum error is 0.4 microns. This range of error is one reason that fractional micron feature sizes fabricated on multi-mask devices have been impractical. In addition, in between each step of a multiple lithographic process, the wafer itself may undergo a number of processes including etching, oxidation, cleaning, vacuum deposition, resist stripping and coating, plating, and diffusion doping at elevated temperatures. Such steps, especially those performed at high heat, may be the source of wafer distortions which would prevent the needed accuracy in sequential exposures through multiple masks with features in the submicron range. Another source of error in the lateral positioning of circuit features is variations in the mask to wafer gap. This may be due to lack of flatness in the wafer, lack of flatness in the mask, or improper alignment between the two during an overlay operation.